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| 2 | mjames | 1 | /* ---------------------------------------------------------------------- |
| 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
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| 3 | * |
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| 4 | * $Date: 19. March 2015 |
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| 5 | * $Revision: V.1.4.5 |
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| 6 | * |
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| 7 | * Project: CMSIS DSP Library |
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| 8 | * Title: arm_cmplx_dot_prod_q31.c |
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| 9 | * |
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| 10 | * Description: Q31 complex dot product |
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| 11 | * |
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| 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
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| 13 | * |
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| 14 | * Redistribution and use in source and binary forms, with or without |
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| 15 | * modification, are permitted provided that the following conditions |
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| 16 | * are met: |
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| 17 | * - Redistributions of source code must retain the above copyright |
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| 18 | * notice, this list of conditions and the following disclaimer. |
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| 19 | * - Redistributions in binary form must reproduce the above copyright |
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| 20 | * notice, this list of conditions and the following disclaimer in |
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| 21 | * the documentation and/or other materials provided with the |
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| 22 | * distribution. |
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| 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
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| 24 | * may be used to endorse or promote products derived from this |
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| 25 | * software without specific prior written permission. |
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| 26 | * |
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| 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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| 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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| 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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| 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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| 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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| 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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| 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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| 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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| 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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| 38 | * POSSIBILITY OF SUCH DAMAGE. |
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| 39 | * -------------------------------------------------------------------- */ |
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| 40 | |||
| 41 | #include "arm_math.h" |
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| 42 | |||
| 43 | /** |
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| 44 | * @ingroup groupCmplxMath |
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| 45 | */ |
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| 46 | |||
| 47 | /** |
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| 48 | * @addtogroup cmplx_dot_prod |
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| 49 | * @{ |
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| 50 | */ |
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| 51 | |||
| 52 | /** |
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| 53 | * @brief Q31 complex dot product |
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| 54 | * @param *pSrcA points to the first input vector |
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| 55 | * @param *pSrcB points to the second input vector |
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| 56 | * @param numSamples number of complex samples in each vector |
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| 57 | * @param *realResult real part of the result returned here |
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| 58 | * @param *imagResult imaginary part of the result returned here |
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| 59 | * @return none. |
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| 60 | * |
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| 61 | * <b>Scaling and Overflow Behavior:</b> |
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| 62 | * \par |
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| 63 | * The function is implemented using an internal 64-bit accumulator. |
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| 64 | * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format. |
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| 65 | * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits. |
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| 66 | * Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768. |
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| 67 | * The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format. |
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| 68 | * Input down scaling is not required. |
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| 69 | */ |
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| 70 | |||
| 71 | void arm_cmplx_dot_prod_q31( |
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| 72 | q31_t * pSrcA, |
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| 73 | q31_t * pSrcB, |
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| 74 | uint32_t numSamples, |
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| 75 | q63_t * realResult, |
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| 76 | q63_t * imagResult) |
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| 77 | { |
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| 78 | q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */ |
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| 79 | q31_t a0,b0,c0,d0; |
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| 80 | |||
| 81 | #ifndef ARM_MATH_CM0_FAMILY |
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| 82 | |||
| 83 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
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| 84 | uint32_t blkCnt; /* loop counter */ |
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| 85 | |||
| 86 | |||
| 87 | /*loop Unrolling */ |
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| 88 | blkCnt = numSamples >> 2u; |
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| 89 | |||
| 90 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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| 91 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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| 92 | while(blkCnt > 0u) |
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| 93 | { |
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| 94 | a0 = *pSrcA++; |
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| 95 | b0 = *pSrcA++; |
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| 96 | c0 = *pSrcB++; |
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| 97 | d0 = *pSrcB++; |
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| 98 | |||
| 99 | real_sum += ((q63_t)a0 * c0) >> 14; |
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| 100 | imag_sum += ((q63_t)a0 * d0) >> 14; |
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| 101 | real_sum -= ((q63_t)b0 * d0) >> 14; |
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| 102 | imag_sum += ((q63_t)b0 * c0) >> 14; |
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| 103 | |||
| 104 | a0 = *pSrcA++; |
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| 105 | b0 = *pSrcA++; |
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| 106 | c0 = *pSrcB++; |
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| 107 | d0 = *pSrcB++; |
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| 108 | |||
| 109 | real_sum += ((q63_t)a0 * c0) >> 14; |
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| 110 | imag_sum += ((q63_t)a0 * d0) >> 14; |
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| 111 | real_sum -= ((q63_t)b0 * d0) >> 14; |
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| 112 | imag_sum += ((q63_t)b0 * c0) >> 14; |
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| 113 | |||
| 114 | a0 = *pSrcA++; |
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| 115 | b0 = *pSrcA++; |
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| 116 | c0 = *pSrcB++; |
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| 117 | d0 = *pSrcB++; |
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| 118 | |||
| 119 | real_sum += ((q63_t)a0 * c0) >> 14; |
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| 120 | imag_sum += ((q63_t)a0 * d0) >> 14; |
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| 121 | real_sum -= ((q63_t)b0 * d0) >> 14; |
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| 122 | imag_sum += ((q63_t)b0 * c0) >> 14; |
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| 123 | |||
| 124 | a0 = *pSrcA++; |
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| 125 | b0 = *pSrcA++; |
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| 126 | c0 = *pSrcB++; |
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| 127 | d0 = *pSrcB++; |
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| 128 | |||
| 129 | real_sum += ((q63_t)a0 * c0) >> 14; |
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| 130 | imag_sum += ((q63_t)a0 * d0) >> 14; |
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| 131 | real_sum -= ((q63_t)b0 * d0) >> 14; |
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| 132 | imag_sum += ((q63_t)b0 * c0) >> 14; |
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| 133 | |||
| 134 | /* Decrement the loop counter */ |
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| 135 | blkCnt--; |
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| 136 | } |
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| 137 | |||
| 138 | /* If the numSamples is not a multiple of 4, compute any remaining output samples here. |
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| 139 | ** No loop unrolling is used. */ |
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| 140 | blkCnt = numSamples % 0x4u; |
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| 141 | |||
| 142 | while(blkCnt > 0u) |
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| 143 | { |
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| 144 | a0 = *pSrcA++; |
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| 145 | b0 = *pSrcA++; |
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| 146 | c0 = *pSrcB++; |
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| 147 | d0 = *pSrcB++; |
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| 148 | |||
| 149 | real_sum += ((q63_t)a0 * c0) >> 14; |
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| 150 | imag_sum += ((q63_t)a0 * d0) >> 14; |
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| 151 | real_sum -= ((q63_t)b0 * d0) >> 14; |
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| 152 | imag_sum += ((q63_t)b0 * c0) >> 14; |
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| 153 | |||
| 154 | /* Decrement the loop counter */ |
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| 155 | blkCnt--; |
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| 156 | } |
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| 157 | |||
| 158 | #else |
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| 159 | |||
| 160 | /* Run the below code for Cortex-M0 */ |
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| 161 | |||
| 162 | while(numSamples > 0u) |
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| 163 | { |
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| 164 | a0 = *pSrcA++; |
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| 165 | b0 = *pSrcA++; |
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| 166 | c0 = *pSrcB++; |
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| 167 | d0 = *pSrcB++; |
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| 168 | |||
| 169 | real_sum += ((q63_t)a0 * c0) >> 14; |
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| 170 | imag_sum += ((q63_t)a0 * d0) >> 14; |
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| 171 | real_sum -= ((q63_t)b0 * d0) >> 14; |
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| 172 | imag_sum += ((q63_t)b0 * c0) >> 14; |
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| 173 | |||
| 174 | /* Decrement the loop counter */ |
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| 175 | numSamples--; |
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| 176 | } |
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| 177 | |||
| 178 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
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| 179 | |||
| 180 | /* Store the real and imaginary results in 16.48 format */ |
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| 181 | *realResult = real_sum; |
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| 182 | *imagResult = imag_sum; |
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| 183 | } |
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| 184 | |||
| 185 | /** |
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| 186 | * @} end of cmplx_dot_prod group |
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| 187 | */ |